Semiconductor devices are found in many products used in modern society. Semiconductors find applications in consumer items such as entertainment, communications, networks, computers, and household items markets. In the industrial or commercial market, semiconductors are found in military, aviation, automotive, industrial controllers, and office equipment.
The manufacture of semiconductor devices involves formation of a wafer having a plurality of die. Each die contains hundreds or thousands of transistors and other active and passive devices performing a variety of electrical functions. For a given wafer, each die from the wafer typically performs the same electrical function. Front-end manufacturing generally refers to formation of the semiconductor devices on the wafer. The finished wafer has an active side containing the transistors and other active and passive components. Back-end manufacturing refers to cutting or singulating the finished wafer into the individual die and then packaging the die for structural support and/or environmental isolation.
One goal of semiconductor manufacturing is to produce a package suitable for faster, reliable, smaller, and higher-density integrated circuits (IC) at lower cost. Flip chip packages or wafer level packages (WLP) are ideally suited for ICs demanding high speed, high density, and greater pin counts. Flip chip style packaging involves mounting the active side of the die facedown toward a chip carrier substrate or printed circuit board (PCB). The electrical and mechanical interconnect between the active devices on the die and conduction tracks on the carrier substrate is achieved through a solder bump structure comprising a large number of conductive solder bumps or balls. The solder bumps are formed by a reflow process applied to contact pads disposed on the semiconductor substrate. The solder bumps are then soldered to the carrier substrate. The flip chip semiconductor package provides a short electrical conduction path from the active devices on the die to the carrier substrate in order to reduce signal propagation, lower capacitance, and achieve overall better circuit performance.
The reliability and integrity of the solder bump is important to testing, manufacturing yield, and longevity of the product while in service. Device reliability is a function of the interconnect material and structural integrity of each solder bump and its effectiveness as an electrical interconnect. Many prior art devices have attempted to modify the basic structure of the solder bump, including encapsulating a first bump within a second bump, as described in U.S. Pat. No. 6,077,765 and US patent application 20040266066. However, these prior art solder bump structures are known to exhibit weak solder joints, particularly with fine pitch applications. In addition, some prior art bump structures continue to have high joint resistance, which increases power consumption and heat dissipation.
A need exists for a solder bump structure with enhanced strength and reliability and lower joint resistance.